(Not Applicable)
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1. Field of the Invention
The present invention relates generally to semiconductor packages and, more particularly, to a leadframe which is adapted to provide improvements in the electrical and thermal performance and the assembly of packaging for transistor devices, such as MOSFET devices.
2. Description of the Related Art
As is known in the electrical arts, certain high power semiconductor devices are fabricated by forming a number of individual, low-power devices in a single semiconductor die or chip, and then xe2x80x9cparallelingxe2x80x9d such devices, i.e., connecting the individual devices together in parallel within the package of the device to define a single device capable of higher power output. One such device is known as a MOSFET (Metal-Oxide-Semiconductor-Field-Effect-Transistor). MOSFETs and similar devices typically include a die body having a source terminal and a gate terminal disposed on the top surface thereof, and a drain terminal disposed on the bottom surface thereof. In prior art semiconductor packages such as MOSFETs, the source terminal is often connected to the leads of the leadframe of the semiconductor package through the use of multiple, parallel bonded wires. However, the use of such wires often contributes to various deficiencies in the performance of the semiconductor package, including relatively high electrical resistances, high parasitic source-inductance, and the formation of craters and voids in the die caused by the bonding of the wires.
In the prior art, it has been learned that most of the foregoing problems can be eliminated or reduced by replacing the large number of bonded wires from the source terminal of the MOSFET with a single, elongate conductive strap that facilitates the electrical connection of the source terminal to the source leads of the semiconductor package. However, this construction/assembly alternative also has been found to present certain problems. One such problem relates to the differences in the respective thermal coefficients of expansion of the materials of the strap, the semiconductor die (MOSFET), and leadframe. As a result of these differences, these parts experience different amounts of expansion and contraction with changes in the temperature of the semiconductor package. This relative movement of the respective parts causes large sheer stresses to develop in the attachment joints between them, which are typically lap joints of conductive adhesive or solder. These sheer stresses result in degradation of the electrical connection between the strap, die, and substrate and, in particular, in an unacceptably large change or shift in the critical drain-to-source resistance of the semiconductor die. The present invention addresses these deficiencies by providing a leadframe based semiconductor package for semiconductor devices, such as MOSFET devices, which is adapted to provide improvements in electrical and thermal performance. The structural attributes of the present invention and the advantages attendant thereto will be described in more detail below.
In accordance with the present invention, there is provided a semiconductor package comprising a leadframe which includes a die paddle having an opening formed therein. In addition to the die paddle, the leadframe includes a plurality of leads, at least one of which is disposed in spaced relation to the die paddle. The remaining leads are attached to the die paddle and extend therefrom. Electrically connected to the die paddle is the source terminal of a semiconductor die which also includes a gate terminal and a drain terminal. The gate terminal is itself electrically connected to at least one of the leads disposed in spaced relation to the die paddle. A package body at least partially encapsulates the die paddle, the leads, and the semiconductor die such that portions of the leads and the drain terminal of the semiconductor die are exposed in the package body.
Advantageously, the exposure of the drain terminal of the semiconductor die within the package body allows for the direct electrical connection thereof to an underlying substrate such as a printed circuit board. The source terminal of the semiconductor die may optionally be exposed within the package body of the semiconductor package as well for providing enhanced thermal performance or heat dissipation capability.
The present invention is best understood by reference to the following detailed description when read in conjunction with the accompanying drawings.